Complete custom transistor level circuit design and layout of CPU functional units, macros, and standard cell elements for low power .
*  Deliver circuits that meet power, timing and area constraints.
*  Verify circuit functionality to HDL model (Verilog).
*  Interface with design groups for timing closure, verification, support, etc.
*  Provide timing models of circuits for CPU-level timing closure.
Required:
CMOS circuit design skills and experience
Expertise with Spice, or similar, simulation tool
Experience completing and checking CMOS circuit layouts
Experience with industry standard custom circuit EDA tools (such as Cadence or Silicon Canvas)

Preferred:
1 to 3 years industry CPU circuit design experience
Experience with low power design techniques
Experience with high speed simulation tools such as Nanosim, HSIM or Finesim-pro
Experience with Verilog coding
Experience with static timing tools
The ability to write and speak clearly is essential.
Must be able to work effectively as part of a interdependent engineering team.

To link your application directly to the job, please apply directly through our career page at:

http://jobs.qualcomm.com/staffing/Staffing.asp?page=search

Type 1853701 into the requisition number field and click on the position.

Thank you