Experience with backend design of a CPU core.
Floorplanning, place and route, power grid and clock tree design and analysis.
Core level timing and signal integrity closure, extraction, DRC and LVS.
Use semi-custom layout where appropriate to maximize density, performance, and power efficiency.
Implement DFM and DFT requirements.
Respond quickly to engineering changes.

Experience with EDA tools and methodologies for all tasks described above.
EDA Tool and Unix shell scripting.
Familiarity with deep sub-micron CMOS circuit and technology issues.
Ability to creatively solve unanticipated problems.

Excellent verbal and written communication skills.
Ability to work in a team environment.
Organized and motivated.

To link your application directly to the job, please apply directly through our career page at:

http://jobs.qualcomm.com/staffing/Staffing.asp?page=search

Type 1853681 into the requisition number field and click on the position.

Thank you