Lead architecture and design of CMOS high-speed interface circuits and mixed-signal circuits.

Responsibilities/Duties:

- Lead design and implementation of high speed interface circuit.

- Design projects include high speed transceivers and high frequency PLL’s.

- Design, simulation, and verification of mixed-signal circuits.

- Supervise closely IC circuit/mask designers, including providing floorplan and layout guidelines.

- Support lab characterization of silicon.

- Solve challenges of circuit design in deep submicron CMOS.

- Work with cross functional teams and take designs through implementation and productization.

Background/Experience/Skills:
- BS or MS in Electrical Engineering (PHD is preferred) and excellent hands-on lab experience with silicon validation, debugging, characterization, and bring up.

- 8+ years of design experience in CMOS analog / mixed-signal circuit design.

- Working knowledge of Cadence custom design tools, circuit simulator, timing analysis tool.

- Experience with Verilog, Matlab, Primetime, Nanotime.

- Demonstrated experience in designing and mentoring designers.

- Extensive design experience in Tx, Rx, CDR, PLL for high speed IO interfaces.

- In-depth understanding of deep submicron CMOS process and related circuit design issues.

- Experience in silicon bring-up, debugging and use of lab instrumentation is required.

U.S. Citizenship, Pre-Employment Drug Screen, and Background Check Required.